The present invention relates to a semiconductor device, and more particularly, it relates to a semiconductor device which has a lateral type or vertical type field effect transistor structure, and is suitably applied as a device for high-speed switching or a device for power control.
As the supply voltage for CPUs decreased, the power supply with the synchronous rectification system using a field effect transistor is being greater used.
FIG. 19 is a schematic diagram showing the cross-sectional structure of MOSFET (Metal-oxide-Semiconductor Field Effect Transistor) used for such a power supply. Hereafter, a n channel type will be explained. It is also possible to acquire the similar structure about p channel type by reversing p type and n type for each semiconductor part.
This MOSFET has the so-called “vertical type” structure, where n type semiconductor region 104 is provided on n+ type substrate 102, and p type base regions 106 are selectively formed on the surface of the n type semiconductor region 104. Moreover, n+ type source region 108 is selectively formed on the surface of the p type base region 106, and a gate oxide film 110 and a gate electrode 112 are formed on the p type base region 106 and n− type semiconductor region 104 between the n+ type source region 108 and the neighboring n+ source region 108.
The source electrode 114 is connected to n+ type source region 108, and the drain electrode 116 is connected to the back side of n+ type substrate 102. By applying a bias voltage to the gate electrode 112, a channel can be formed on the surface of p+ type base region 106, and a current can be passed between the source and the drain.
However, in the semiconductor device illustrated in FIG. 19, since the facing area between the gate and the drain is large, and since the gate and the drain have countered through gate oxide 110, the feedback capacitance between the gate and the drain is large. This feedback capacitance is one of the parameters which impede high-speed operation of the semiconductor device and increase switching loss. Therefore, it is desirable to reduce the feedback capacitance between the gate and the drain.
On the other hand, narrowing the interval between p type base regions 106 and 106 may also be considered so that the facing area between a gate and a drain may be reduced. However, in this case, since the current path between drain and source is constricted, the JFET resistance Rj corresponding to resistance of this current path becomes high, and electrical connection loss increases.
As mentioned above, in the conventional MOSFET, there was a relation of a trade-off between ON resistance and the feedback capacitance, and there was a problem that there was a limit in reducing high-speed operation, electrical connection loss, and switching loss.